V.Chanakya | Research & Reviews | Velalar College of En

ISSN ONLINE(2319-8753)PRINT(2347-6710)

V.Chanakya

Department of ECE, Velalar College of Engineering and Technology, Tamilnadu, India

Biography

V.Chanakya PG Scholar, Department of ECE, Velalar College of Engineering and Technology, Tamilnadu, India

Research Interest

All digital delay locked loop (ADDLL), all digital phase locked loop (ADPLL), delay-line, digitally controlled oscillator (DCO), flip-flops, sense amplifier, spread-spectrum clock generator (SSCG).