Design of Wide Tuning Range and Low Power Dissipation of VCRO in 50nm CMOS Technology | Abstract

ISSN ONLINE(2278-8875) PRINT (2320-3765)

Research Article Open Access

Design of Wide Tuning Range and Low Power Dissipation of VCRO in 50nm CMOS Technology

Abstract

A three stage Voltage Controlled Ring Oscillator (VCRO) has been designed, analysis and simulated in 50 nm CMOS Technology by using LT spice. The designed circuit proposed a wide tuning range of operating frequency with very low of supply voltage and low power consumption that can be used for various applications. The designed circuit is operated at 0.8 V to 1.2 V supply Voltage to obtain wide operating frequency range which simulated results show range of about 10 GHz with minimum frequency of 0.80 GHz to 11.64 GHz. The designed circuit provides minimum power consumption of 4.45μW.

Gagandeep Singh, Mandeep Singh Angurana

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