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Cascaded H-Bridge Multilevel Inverter with a New Selective Harmonic Mitigation Technique to Meet Grid Codes Under Non-Equal Dc Link Voltages with Power Quality Enhancement

B.Rajashekar1, T.Praveen Kumar2, R.Ramesh3
  1. M.Tech Student, Department of EEE, Jyothishmathi Institute of Technology and Science, JNTU Hyderabad, Karimnagar, Telangana, India
  2. Associate Professor, Department of EEE, Jyothishmathi Institute of Technology and Science, JNTU Hyderabad. Karimnagar, Telangana, India
  3. Associate Professor, Head of Department of EEE, Jyothishmathi Institute of Technological Sciences, JNTU Hyderabad. Karimnagar, Telangana, India
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This paper presents a new control technique to meet the grid codes in cascaded multilevel inverters. In this paper a new selective harmonic mitigation (SHM-PWM) technique to produce waveforms with low switching frequency without compromising waveform quality, which is capable of meeting grid codes even under non equal dc link voltages. In this paper by maintaining voltage balancing and reducing the total harmonic distortion we can achieve the enhancement of power quality with unequal dc sources. This paper also focuses on the method to enhance the power quality of individual cells which leads to higher power conversion efficiency with equal power distribution. This reduces the initial cost, and complexity hence it is apt for industrial applications. Simulation work is done using the MATLAB software and experimental results have been presented to validate the theory.


Cascaded multilevel inverter, SHM technique, Grid codes, Voltage balancing, Power quality enhancement.


In recent years, multilevel inverters have gained much attention in the application areas of medium voltage and high power. Multilevel converters utilize several DC voltages to synthesize a desired AC voltage. For this reason, multilevel converters can reduce (dv / dt) to conquer the motor failure problem and EMI problems. Multilevel converters also have emerged as the solution for working with higher voltage levels. Multilevel converters include an array of power semiconductors and capacitor voltage sources, which generate output voltages with stepped waveforms. The commutation of the switches permits the addition of the capacitor voltages, which reach high voltage at the output, while the power semiconductors must withstand only reduced voltages. Voltage steps in multilevel inverters might not be the same. Available DC sources of the cascade multilevel inverters are batteries, photovoltaic arrays, fuel cells, rectifiers…etc. In cascade multilevel inverter based photovoltaic systems, the operating DC voltages of standard photovoltaic cells range from 15V to 35 V. In the cascade multilevel inverter based energy storage system with batteries, the voltages of batteries also change due to their states of charge. The varying voltages of DC sources result in varying voltage steps in the multilevel output waveform. The varying voltage steps (varying DC source voltages) bring challenges to the algorithms in determining switching angles. Not only switching angles, but also the variations of voltage steps, will determine the harmonic distortion of output voltages.
The elimination of low-order harmonics is an important issue in many applications. When high switching efficiency is of utmost importance, it is desirable to keep the switching frequency much lower. To control the output voltage and to eliminate the undesired harmonics in multilevel converters with equal dc voltages, various modulation methods such as sinusoidal pulse width modulation (PWM) and space-vector PWM techniques are suggested [3], [6]. However, PWM techniques are not able to eliminate lower order harmonics completely. Another approach is to choose the switching angles so that specific higher order harmonics such as the 5th, 7th, 11th, and 13th are suppressed in the output voltage of the inverter. This method is known as selective harmonic elimination (SHE) method. High power converters are built using high-voltage and high-current rated semiconductors. The commutation of these devices imply large amounts of energy per cycle leading to very low switching frequency in order to avoid a high rise on the semiconductors temperature. The consequence is high harmonic distortion generated by the converter. Grid Codes requirements specify the maximum admitted harmonic distortion. The well known Selective Harmonic Elimination Pulse Width Modulation (SHEPWM) technique has proved to be useful in eliminating some of the undesired harmonics without increasing the switching frequency, leaving the rest of them free. The solution to the rest of harmonics is to add bulky and expensive filters. Pulse Width Modulation (SHMPWM) has been introduced. The aim of this technique is to mitigate the amplitude of the undesirable harmonics, to acceptable values to meet the grid code, considering a larger number of harmonics.


In the proposed topology of H-bridge Cascaded multilevel inverter with unequal dc sources is shown in the fig.1 below, where VA is the dc voltage of the upper cell and VB represents the voltage of the lower cell. However, this increase in voltage levels is achieved at a cost of reduced converter structure modularity. By using 15 switching angles, the proposed SHMPWM technique achieves switching patterns that fulfill the applied grid code for any modulation index up to 1.19; therefore, the bulky grid connection tuned filters can be avoided.
If different dc voltages are used, as is the case in an asymmetric CHB converter, the number of levels can be increased. For example, using two cells, up to nine levels may be achieved in the output waveform. The proposed technique is named SHMPWM because the method reduces the harmonic content own to acceptable levels. In this paper only for three-level Converters is considered. The principle of SHM technique for 3 level converters is given as Fourier analysis can be used to study a typical threelevel waveform with k switching angles αi (i =0, . . . , k − 1) (Fig. 2). The amplitude of each harmonic can be obtained using the following expression where Hj is the amplitude of the jth harmonic:
This expression can be used to set a specific value for each harmonic amplitude using the switching angles as degrees of freedom. The well known SHE-PWM technique is based on this theory, i.e., the switching angles are used to set the amplitude of the fundamental harmonic and cancel a set of specific harmonics. The modulation index is defined as the relationship between the dc link voltage of the converter and the amplitude of the generated fundamental component is given as Ma = H1 π/4Vdc. Considering the half- wave symmetry in the waveform, even harmonics have zero amplitude so the chosen harmonic orders would be 3, 5, 7, . .and up to k − 1 harmonics can be cancelled using k switching angles. In balanced three-phase topologies without a neutral connection, the triplen harmonics are also canceled, and so it is possible to eliminate a very high number of the low-order harmonics with a low switching frequency.
The SHM-PWM technique it doesn’t cancel the harmonics completely, instead, they just have to be reduced to levels where they can be considered as acceptable limits which are grid codes. The maximum harmonic content for a gridconnected inverter can be obtained from the limits specified in the actual grid codes (Lj represents the limit for the jth harmonic). The SHM-PWM technique can be formulated using a system of inequalities which can be arranged into an objective function to be minimized using an optimization method as;
The extra flexibility given by the SHM-PWM principle can be used for different objectives, for example reducing the THD, considering a higher number of harmonics using the same number of switching angles, or extending the modulation index range for the same set of valid solutions. In this way, the elimination of some harmonics is avoided, but high-quality output signals are obtained. This method reformulates the applied grid code and the switching pattern as a nonlinear optimization problem over a continuous space. Solving these nonlinear equations is still very timeconsuming. One of the attractive points of this modulation is that it can be customized based on the grid code. In the above analysis the selective harmonic mitigation technique is very efficient to meet the grid codes by selecting the appropriate switching angles.


In many applications, it is desirable to share the power flow among all the cells equally in order to avoid overheating of some specific switching devices and consequently extend the lifetime of all the elements of the converter. Divergences of the dc link voltages from the desired values will have an effect on the operation of the converter. Such operation may have an undesirable effect on the output voltage waveform of the converter. This is particularly the case when pre computed modulation strategies such as SHEPWM or SHM-PWM are used as the angles may have been derived under the assumption that the dc link voltages are balanced. In high power applications, the cascaded multilevel inverter with unequal dc sources having the loads such as inductive loads causes rapid and large swings in active and reactive power with harmonic distortion and phase imbalances. This fluctuation in load leads to fast non periodic voltage variations with appreciable voltage distortion. The use of fast acting power electronic converters with fast and efficient modulation techniques can provide precise and flexible control to alleviate disturbances and improve power quality. To assess the effectiveness of the multilevel inverter with unequal dc sources, the improved power quality and the impact of the control performance depends on the following factors: A. Voltage Balancing B. Total Harmonic Distortion (THD) A. Voltage Balancing Capacitor voltage balancing is important to the successful implementation of the power quality enhancement. The challenges of the capacitor voltage balancing include, achieving a low THD in the converter output voltage, maintaining equal stress on the converter semiconductor switches and successful elimination of unwanted low order harmonics. One challenging problem of the cascade multilevel inverter with unequal dc sources is the imbalance of the DC capacitor voltages. The imbalance is caused by: 1) Different switching patterns for different H-bridges. 2) Parameter variations of active and passive components inside H-bridges. 3) Control resolution.
To achieve higher voltage quality, the switching patterns are usually different for different H-bridges in a phase. The differences of switching patterns mean that H-bridges cannot equally share the exchanged power with the power system. This causes uneven charging of DC capacitors. The parameter variations of components inherently cause different power losses of H-bridges.
The imbalance of DC capacitor voltages will degrade the quality of the voltage output. In severe cases, this could lead to the complete collapse of the power conversion system. Moreover, it will cause excessive voltages across the devices and an imbalance of switching losses. An adequate control strategy for avoiding the imbalance of DC capacitor voltages must meet the following requirements.
2) It can balance voltages when components of H-bridges have parameter variations.
B. Total Harmonic Distortion
As we already discussed about the Total harmonic distortion in the above analysis of using selective harmonic mitigation technique. There are so many control methods to achieve low total harmonic distortion but here in this proposed topology it shows the better harmonic spectrum which is shown in the experimental results of fig.4 which shows low total harmonic distortion, gives the power quality improvement and consequently the higher efficiency of the converter.


In the proposed topology, the SHMPWM technique, keeps some specific harmonics below a safe level to meet the grid codes instead of making them zero as in SHEPWM, As a consequence, it is possible to fulfill the grid codes with a lower switching frequency. Using a three-cell topology and three angles per cell, it is possible to set the amplitude of the fundamental component and to control up to six undesirable harmonic components.
By using 15 switching angles, the proposed SHMPWM technique achieves switching patterns that fulfill the applied grid code for any modulation index up to 1.19; therefore, the bulky grid connection tuned filters can be avoided.
The total harmonic distortion waveform for cascaded multilevel inverter using selective harmonic mitigation is analysed in the following waveforms and it shows the distortion level of corresponding harmonics compared with the fundamental waveform. The results of experiment I shown in fig.4 above that, using SHMPWM technique, all harmonics are taken into consideration, remains under the grid code specific limit and the same happens with the total harmonic distortion, even considering harmonics up to 49th. However, with SHEPWM technique, the pre computed data make almost zero all the harmonics except for harmonics 47th to 49th which are left completely uncontrolled which generates values far over the grid code limits.


This paper presents a selective harmonic mitigation control method for a cascaded H-bridges multilevel converter with unequal DC sources. This method has lower switching frequency than the earlier proposed methods. The proposed SHMPWM technique adapts an efficient behavior in the new scenario, where high quality is demanded by the electrical utilities and grid codes have to be fulfilled. All the harmonics and the THD are considered as a global problem to optimize the behavior of the complete system, fulfilling specific and actual grid codes. By using switching angles, th proposed SHMPWM technique achieves switching patterns that fulfill the applied grid code for any modulation index up to 1.19; therefore, the bulky grid connection tuned filters can be avoided. And by voltage balancing and reducing the total harmonic distortion we can achieve the enhancement of power quality with unequal dc sources. The experiments validated that the proposed method can eliminate the specified harmonics as expected.


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