Comparative Study of Power, Delay and Noise of Logic Gates between CMOS and GaAs MESFET

Abstract

This Gallium Arsenide MESFET based an absolutely new model of universal gates has been designed, analysed, reviewed & compared. Overall the newly designed model is fed by physical inputs which are highly researched and developed several times. This model is capable to remove all the difficulties of previously proposed and designed models. The necessity of implementing this type of structure is to encounter absence of dielectric in the CMOS structure [1]. As we remember structure of MOSFET; there Si was implanted beneath the gate and this oxide layer actually acts as the dielectric material alike to any capacitor. Actually there is no provision to implement such kind of dielectric during the fabrication process of the MESFET. Observing this analogical difference it is planned that if somehow any kind of dielectric material which is nearer to the ox ide layer, implanted in the MOSFET during fabrication, is planted in the gate terminal without hampering the fabricated structure the device will analogically same as the MOSFET. This is actual motto to implement MESFET based design.

Keywords

GaAs, MESFET, CMOS, Power, Delay, Noise

INTRODUCTION

In the year of 1991 Mr. Mikael Anderson[2] proposed three different types of logic families to design the universal gates by MESFET. Successful design of NOT and AND gates were made by him.

MESFET was first invented and developed in mid of 1970s for necessity of manufacturing high speed communication devices, such that device can handle the signal frequency in GHz range and only for that reason the device will be designed and developed. This MESFET mainly used to make special device such as GUNN DIODE, TUNNEL DIODE, IMPATT DIODE[3] etc. Moreover this device has a great application on manufacturing communication instruments such as, sample and hold circuit, PAM and PCM modulator demodulator etc.

It has been observed that the main disadvantage of the CMOS based device was ‘Unsupported GHz ranged FM or any kind of Microwave signal’ either the device comes to death or it becomes very slow response zone. So this type of device can’t be used in satellite or high-speed communication devices. Moreover that the devices have low FAN – OUT capabilities and not a good noise immunity capabilities and speed is lower as compared to ECL based devices. Today the trend is high speed without hampering the power consumption to a great extent and should be a better noise immunity level. Focusing this new trend we have started our research on MESFET that we have observed that MESFET can fulfil all these need and this device can be used in the satellite communication also.

RELATED WORK

In the year of 1991 Mr. Mikael Anderson has proposed two basic different models for MESFET, (i) DEPLETION type and (ii) ENHANCEMENT types. Where the DEPLETION type MESFET has four different logics; (a) BFL, (b) SDFL,(c) CDFL, (D) SCFL and ENHANCEMENT type MESFET has three different types logics (a) DCFL, (b) SBFL and (c) E/D BFL. Each of the logic has suffered some problems one has speed high but power consumption high but other reduces power consumption but propagation delay was high and some contains more numbers of gates. Analyzing all possible realizing characteristics Mr. Mikael Anderson has come to the conclusion among all the logic families E – DCFL is the best optimized one as it contains comparatively less nos of gates and consumes less power and optimized propagation delay.

PROPOSED DESIGN PRINCIPLES

Now we are going to discuss about our proposed design. At first we should remember that all the designed circuits are designed using same kind of material → Enhancement type GaAs based MESFET; power supply (Vdd) to all circuits are same and it is 4.5 V for all.

A. NOT Gate

The schematic of newly designed GaAs FET based inverter is shown in Fig. 1. The diagram is exactly same as the CMOS based diagram[1] but the only difference is that each and every gate terminal of the MESFET is mounted by a semiconductor based capacitor. In the design methodology 1 P and 1 N type MESFET in series and shorting the gate terminal the input data is supplied as the bit format. The Input and output waveform is shown in Fig. 2.

B. AND, NAND, OR, NOR, XOR GATE

The NAND gate is also designed using the same methodology with MESFET used in the CMOS based design [1] as shown in Fig. 3. The Input and output waveform is shown in Fig. 4. The NOR gate is designed as shown in Fig. 5. The Input and output waveform is shown in Fig. 6. If we use an Inverter at the output of the circuit then we will get the OR gate. The Input and output waveform is shown in Fig. 7. The XOR gate is designed as shown in Fig .8.

RESULT ANALYSIS

Now we are going to compare the Power, Delay and Noise of our designed circuits using GaAs MESFET with the Conventional CMOS based devices. The Comparison is Shown in the following Table 1. The Comparative analysis of Power is shown in Fig 9, Delay in Fig.10 and Noise in Fig. 11.

The specification of semiconductor based capacitor are: Length (L): - 150 nm, Width (W): - 450 nm, Junction Bottom Capacitance: - 0.3nF/m,Junction Sidewall Capacitance: - 0.5nF/m, Narrowing due to side etching: - 50nm.

CONCLUSION

From the above analytical data we can conclude that the CMOS based device consumed low power; but MESFET based devices have better noise immunity than the CMOS based devices and it works too faster than CMOS based devices.

Though the high power consumption issue has not been encountered in this newly designed device it has several advantages which are listed below:

Advantages: -

 Better Fan – Out (As we see the NOT gate circuitry then we will see that it actually driving 2 other same NOT gate by its output.)

 Better Noise Immunity (MESFET based devices has better noise immunity than CMOS; follow chart)

 Operates at High frequency range (All the output of the circuitry given here are in the 200 MHz frequency range but they are also tested in the GHz frequency range and working as same; so that we can use this for satellite communication).

 Can handle GHz to THz ranged FM signal & GHz ranged AC source.

 Negligible internal delay.

 Better output signal quality than CMOS based device.

 All initial delay for the bulky design is in the 0 level.

The designed devices also have some difficulties and those have been tried to minimize with the best effort such that the device can work for better performances.

The only and the main difficulty is:

 Large amount of power consumption; as we mentioned above that to operate a MESFET based designed circuit optimum supply voltage or VDD should be 4.5V.

Moreover that, it has low noise immunity level compared to CMOS based design.

ACKNOWLEDGMENT

The authors would like to thank Prof. (Dr.) M.R.Kanjilal and Faculty Members, Department of Electronics and Communication Engineering, Narula Institute of Technology, WBUT, for many insightful discussions.

Tables at a glance

Table 1

Figures at a glance

Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11

References

Sung – Mo Kang; Yusuf Leblebici, “CMOS Digital Integrated Circuits Analysis and Design”, Book. Mikael Andersson, “GaAs MESFET MODELING FOR DIGITAL INTEGRATED CIRCUIT SIMULATION”. Samuel Y. Liao,“Microwave Devices and Circuits”, Book, 3rd Edition. Dimitris Pavlidis, “HBT vs. PHEMT vs. MESFET: What's best and why?”, Copyright © 1999 GaAs Mantech. Otto Berger, “GaAs MESFET, HEMT and HBT Competition with Advanced Si RF Technologies”, Siemens Semiconductor Group, Copyright © 1999 GaAs Mantech