ISSN ONLINE(2278-8875) PRINT (2320-3765)

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FPGA IMPLEMENTATION OF HYBRID CRYPTOGRAPHY ENGINE FOR COMMUNICATION SYSTEMS

Shambhulingaiah C. M1, Ravi Simha B. N2, Dr. M.Z.Kurian3
  1. PG Student [VLSI & Embedded systems], Sri Siddhartha Institute Of Technology, Tumkur, Karnataka, India
  2. Asst. Professor, Dept. of ECE Sri Siddhartha Institute of Technology, Tumkur, Karnataka, India
  3. HOD, Dept. of ECE, Sri Siddhartha Institute of Technology, Tumkur, Karnataka, India
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Abstract

Security becomes increasingly important for many applications, such as video surveillance, confidential transmission military and medical applications. Data hiding has been used for several years to transmit data without being intercepted by unwanted viewers. The core of the system is two widely used cryptographic algorithm core: Secure Hash Algorithm SHA-256 and Advanced Encryption Standard AES-128. The system design is with hardware’s effectiveness in mind. This cryptographic engine was used as an integral part of security data storage system. Cryptography algorithm is implemented on Software using computer. It has been observed that the performance of the software is not up to the mark. Moreover Security flaws were identified in Secure Hash Algorithm SHA–1, namely that a mathematical weakness exist, that indicating a stronger hash function would be desirable. So SHA-256 is used to overcome this.