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Reversible Multiplier – A Review

Abstract

Increasing demand for reduction in power dissipation in digital computer system has led to new mode of computation for digital design giving birth to reversible computing. Its main aim is low power dissipation in logical elements but can have some other advantages likeerror preventionand data security. In present-day, reversible logic has bring out to be an optimistic computing model having applications in low power CMOS, nanotechnology, quantum computing and DNA computing. This paper presents reviews about various purposed schemes used to designn×nreversible multiplier. The reversible multipliers are optimized in terms of total quantum cost, number of ancillary inputs, number of garbageoutputs and hardware complexity.

Mandeep Kaur, Harpreet Singh, Chakshu Goel

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