Research Article Open Access

Design and Implementation of 2by3 Prescaler using Different Logic in CMOS 45nm Technology

Abstract

Frequency division is one of the important applications of flip-flops. A wide-band frequency synthesizer implemented by phase-locked loop (PLL) uses prescaler (also called N/N+1 counter) as fundamental block. In PLL high frequency output of VCO is coupled directly to the prescaler directly. As process technology is reducing, channel length and supply voltage is decreasing rapidly. Therefore prescaler has to work at high frequency as well as low operating voltage. Using pass transistor or CMOS Technology are the incorporation of additional logic gates between the flip-flops to achieve the two different division ratios, the speed of the prescaler is affected by creating another propagation delay and the increases the switching power.

Siddharth A. Koshiyar, Narendra J. Patadiya, Bharat H. Nagpara

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